With the developments of semiconductor technology, requirements for feature size and performance of CMOS (Complementary Metal-Oxide Semiconductor) devices are increasing. Device performance can be improved by using a strained channel in the MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor). However, with the increase of density of ICs (Integrated circuits) and decrease of pitches, it is difficult to provide sufficient stress by the strained channel in order to meet the device performance requirement. U.S. patent application US20090309163(A1)-2009-12-17 discloses a method in which stresses in the channels of different devices are adjusted by forming a pMOSFET and an nMOSFET with different heights in a CMOS structure. However, this method requires forming gate stacks with different heights, and the stress obtained in the channel region under a relatively higher gate stack is still not sufficient.